In the manufacture of semiconductor thin film resistor circuits it is generally not possible to simultaneously etch both shallow vias and deep vias. A first problem in attempting to simultaneously etch both shallow vias and deep vias is that too much over etch in the shallow vias will create metal contaminated polymers. The metal contaminated polymers are difficult, if not impossible, to remove in a subsequent ash and solvent step. A second problem in attempting to simultaneously etch both shallow vias and deep vias is that too little etch in the deep vias will leave the via open. A third problem is that the amount of etch required to completely etch the deep via without etching through the end cap metal in the shallow via would necessitate an excessive thickness of end cap metal. A thicker end cap metal degrades an important electrical parameter called resistor matching.
These problems are avoided in the prior art by employing two separate mask layers. A first mask layer is applied and then the deep vias are etched. Then the first mask layer is removed and a second mask layer is applied and the shallow vias are etched. The deep vias and the shallow vias are etched separately. The order can be reversed in that the shallow vias can be etched first and the deep vias etched second.
There is a need in the art for a method in which deep vias and shallow vias can be etched simultaneously. There is also a need in the art for a method in which deep vias and shallow vias can be etched simultaneously using only one mask layer and one etch process.